Követés
Norlina Paraman
Norlina Paraman
E-mail megerősítve itt: utm.my
Cím
Hivatkozott rá
Hivatkozott rá
Év
DTaPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems
MS Mohammed, AAM Al-Kubati, N Paraman, AAH Ab Rahman, ...
Electronics 9 (11), 1980, 2020
102020
Temperature-aware task scheduling for dark silicon many-core system-on-chip
MS Mohammed, AK Al-Dhamari, AAH Ab Rahman, N Paraman, ...
2019 8th International Conference on Modeling Simulation and Applied …, 2019
102019
Implementation of optimized low pass filter for ECG filtering using verilog
NN Samsudin, S Isaak, N Paraman
Journal of Physics: Conference Series 2312 (1), 012049, 2022
62022
A comparative analysis of LFSR cascading for hardware efficiency and high fault coverage in BIST applications
A Alamgir, AKB A’ain, N Paraman, U ullah Sheikh, I Grout
2020 IEEE 29th Asian Test Symposium (ATS), 1-5, 2020
62020
Implementation of active learning in digital systems course
I Ismail, KM Yusof, MMA Zabidi, N Paraman
AIP Conference Proceedings 2433 (1), 2022
42022
Horizontal diversity in test generation for high fault coverage
A Alamgir, AKB A'ain, N Paraman, UU Sheikh, I Grout
Turkish Journal of Electrical Engineering and Computer Sciences 26 (6), 3258 …, 2018
42018
Active and Project-Based Learning Implementation in a Constructively Aligned Digital Systems Design Course
I Ismail, M Mun’im Ahmad Zabidi, N Paraman, K Mohd-Yusof, ...
IEEE Transactions on Education, 2023
32023
PEW: prediction-based early dark cores wake-up using online ridge regression for many-core systems
MS Mohammed, N Paraman, AAH Ab Rahman, FA Ghaleb, A Al-Dhamari, ...
IEEE Access 9, 124087-124099, 2021
32021
Impact of device parameter variation on the electrical characteristic of n-type junctionless nanowire transistor with high-k dielectrics
MA Sule, M Ramakrishnan, NE Alias, N Paraman, Z Johari, A Hamzah, ...
Indonesian Journal of Electrical Engineering and Informatics (IJEEI) 8 (2 …, 2020
32020
Multiple Controlled Antirandom Testing (MCAT) for High Fault Coverage in a Black Box Environment
A Alamgir, AKB A’Ain, UU Sheikh, N Paraman, MM Mokji, I Grout
IEEE Access 7, 117246-117257, 2019
32019
Rapid prototyping of NoC-based MPSoC based on dataflow modeling of real-world applications
MS Mohammed, JW Tang, AAH Ab Rahman, N Paraman, MN Marsono
2018 9th IEEE Control and System Graduate Research Colloquium (ICSGRC), 217-222, 2018
32018
Adaptive random testing with total cartesian distance for black box circuit under test
A Alamgir, AK A’ain, N Paraman, UU Sheikh
Indonesian Journal of Electrical Engineering and Computer Science 20 (2 …, 2020
12020
Built-in Self-Test for Functional Register-Transfer Level using Assignment Decision Diagram
NB Paraman, CY Ooi, AZB Sha’ameri, H Fujiwara
IEEE Twelth Workshop on RTL and High Level Testing, 9-15, 2011
12011
A New Class of Easily Testable Assignment Decision Diagrams
N Paraman, CY Ooi, AZ Shaâ, H Fujiwara
Malaysian Journal of Computer Science 23 (1), 1-17, 2010
12010
ASIC Implementation for Multiple Scan at Register Transfer Level
MLM Radzri, N Paraman, MS Rusli
Journal of Physics: Conference Series 2622 (1), 012026, 2023
2023
Hybrid non scan with built-in self-test for fault coverage improvement
A Ahmadi, N Paraman, MS Rusli, S Isaak
AIP Conference Proceedings 2795 (1), 2023
2023
A 16-bit Brent-Kung Adder scheme for linear array photon counting circuit
S Isaak, AM Ndottiwa, Y Yusof, N Paraman, A Hamzah, YH Chew
AIP Conference Proceedings 2795 (1), 2023
2023
FPGA-Assisted Assertion-Based Verification Platform
N Mohamad, CY Ooi, J Teh, N Paraman, H Hassan, N Ismail
Journal of Telecommunication, Electronic and Computer Engineering (JTEC) 12 …, 2020
2020
Reliability of graphene as charge storage layer in floating gate flash memory
MH Ahmad, NE Alias, A Hamzah, Z Johari, MSZ Abidin, N Paraman, ...
Indonesian Journal of Electrical Engineering and Informatics (IJEEI) 7 (2 …, 2019
2019
TEST REGISTER INSERTION AT RTL BASED ON REDUCED BIST
N Paraman, CY Ooi, AZ Sha'ameri, H Fujiwara
Jurnal Teknologi 79 (1), 2017
2017
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