Vijay Nagarajan
Vijay Nagarajan
Reader (Associate Professor), University of Edinburgh
E-mail megerősítve itt: ed.ac.uk
Cím
Hivatkozott rá
Hivatkozott rá
Év
Copy or discard execution model for speculative parallelization on multicores
C Tian, M Feng, V Nagarajan, R Gupta
2008 41st IEEE/ACM International Symposium on Microarchitecture, 330-341, 2008
1652008
Efficient persist barriers for multicores
A Joshi, V Nagarajan, M Cintra, S Viglas
Proceedings of the 48th International Symposium on Microarchitecture, 660-671, 2015
1102015
ATCache: Reducing DRAM cache latency via a small SRAM tag cache
CC Huang, V Nagarajan
Proceedings of the 23rd international conference on Parallel architectures …, 2014
1032014
ATOM: Atomic durability in non-volatile memory through hardware logging
A Joshi, V Nagarajan, S Viglas, M Cintra
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
1002017
Dynamic recognition of synchronization operations for improved data race detection
C Tian, V Nagarajan, R Gupta, S Tallam
Proceedings of the 2008 international symposium on Software testing and …, 2008
682008
TSO-CC: Consistency directed cache coherence for TSO
M Elver, V Nagarajan
2014 IEEE 20th International Symposium on High Performance Computer …, 2014
622014
Efficient sequential consistency via conflict ordering
C Lin, V Nagarajan, R Gupta, B Rajaram
ACM SIGPLAN Notices 47 (4), 273-286, 2012
582012
Efficient sequential consistency using conditional fences
C Lin, V Nagarajan, R Gupta
International journal of parallel programming 40 (1), 84-117, 2012
522012
ECMon: exposing cache events for monitoring
V Nagarajan, R Gupta
ACM SIGARCH Computer Architecture News 37 (3), 349-360, 2009
462009
Dynamic information flow tracking on multicores
V Nagarajan, HS Kim, Y Wu, R Gupta
Proceedings of the Workshop on Interaction Between Compilers and Computer …, 2008
462008
Dhtm: Durable hardware transactional memory
A Joshi, V Nagarajan, M Cintra, S Viglas
2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018
452018
Matching control flow of program versions
V Nagarajan, R Gupta, X Zhang, M Madou, B De Sutter, K De Bosschere
2007 IEEE International Conference on Software Maintenance, 84-93, 2007
442007
Architectural support for shadow memory in multiprocessors
V Nagarajan, R Gupta
Proceedings of the 2009 ACM SIGPLAN/SIGOPS international conference on …, 2009
422009
Boomerang: A metadata-free architecture for control flow delivery
R Kumar, CC Huang, B Grot, V Nagarajan
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
352017
Software flow tracking using multiple threads
V Nagarajan, HS Kim, Y Wu, R Gupta
US Patent 8,321,840, 2012
312012
McVerSi: A test generation framework for fast memory consistency verification in simulation
M Elver, V Nagarajan
2016 IEEE International Symposium on High Performance Computer Architecture …, 2016
302016
Speculative parallelization of sequential loops on multicores
C Tian, M Feng, V Nagarajan, R Gupta
International Journal of Parallel Programming 37 (5), 508-535, 2009
302009
Blasting through the front-end bottleneck with shotgun
R Kumar, B Grot, V Nagarajan
ACM SIGPLAN Notices 53 (2), 30-42, 2018
282018
Self-recovery in server programs
V Nagarajan, D Jeffrey, R Gupta
Proceedings of the 2009 international symposium on Memory management, 49-58, 2009
222009
Scale-out ccNUMA: Exploiting skew with strongly consistent caching
V Gavrielatos, A Katsarakis, A Joshi, N Oswald, B Grot, V Nagarajan
Proceedings of the Thirteenth EuroSys Conference, 1-15, 2018
212018
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