| A class of hypercube-like networks AS Vaidya, PSN Rao, SR Shankar Proceedings of 1993 5th IEEE Symposium on Parallel and Distributed …, 1993 | 154 | 1993 |
| Integration Challenges and Tradeoffs for Tera-scale Architectures. M Azimi, N Cherukuri, DN Jayasimha, A Kumar, P Kundu, S Park, ... Intel technology journal 11 (3), 2007 | 130 | 2007 |
| Towards a communication characterization methodology for parallel applications S Chodnekar, V Srinivasan, AS Vaidya, A Sivasubramaniam, CR Das Proceedings Third International Symposium on High-Performance Computer …, 1997 | 80 | 1997 |
| SIMD divergence optimization through intra-warp compaction AS Vaidya, A Shayesteh, DH Woo, R Saharoy, M Azimi Proceedings of the 40th Annual International Symposium on Computer …, 2013 | 53 | 2013 |
| Impact of virtual channels and adaptive routing on application performance AS Vaidya, A Sivasubramaniam, CR Das IEEE Transactions on Parallel and Distributed Systems 12 (2), 223-237, 2001 | 49 | 2001 |
| LAPSES: A recipe for high performance adaptive router design AS Vaidya, A Sivasubramaniam, CR Das Proceedings Fifth International Symposium on High-Performance Computer …, 1999 | 39 | 1999 |
| Compressing execution cycles for divergent execution in a single instruction multiple data (SIMD) processor AS Vaidya, A Shayesteh, DH Woo, S Saharoy, M Azimi US Patent 9,606,797, 2017 | 35 | 2017 |
| Conditional and vectored system management interrupts M Ayyar, I Schoinas, RR Menon, A Vaidya, A Kumar US Patent 7,433,985, 2008 | 35 | 2008 |
| Investigating QoS support for traffic mixes with the MediaWorm router KH Yum, A Vaidya, CR Das, A Sivasubramaniam Proceedings Sixth International Symposium on High-Performance Computer …, 2000 | 35 | 2000 |
| Performance benefits of virtual channels and adaptive routing: An application-driven study AS Vaidya, A Sivasubramaniam, CR Das Proceedings of the 11th international conference on Supercomputing, 140-147, 1997 | 35 | 1997 |
| Modular decoupled crossbar for on-chip router D Park, A Vaidya, A Kumar, M Azimi US Patent 9,674,114, 2017 | 27 | 2017 |
| MediaWorm: A QoS capable router architecture for clusters KH Yum, EJ Kim, CR Das, AS Vaidya IEEE Transactions on Parallel and Distributed Systems 13 (12), 1261-1274, 2002 | 24 | 2002 |
| Method and apparatus for hierarchical routing in multiprocessor mesh-based systems AS Vaidya, DN Jayasimha US Patent App. 12/113,281, 2009 | 20 | 2009 |
| Flexible and Adaptive On-Chip Interconnect for Tera-Scale Architectures M Azimi, D Dai, A Kumar, A Meija, D Park, R Saharoy, AS Vaidya Intel Technology Journal 13 (4), 62-77, 2009 | 20 | 2009 |
| A testbed for evaluation of fault-tolerant routing in multiprocessor interconnection networks AS Vaidya, CR Das, A Sivasubramaniam IEEE Transactions on Parallel and Distributed Systems 10 (10), 1052-1066, 1999 | 15 | 1999 |
| MoDe-X: Microarchitecture of a layout-aware modular decoupled crossbar for on-chip interconnects D Park, A Vaidya, A Kumar, M Azimi IEEE transactions on computers 63 (3), 622-636, 2012 | 11 | 2012 |
| On-Chip Interconnect Trade-Offs for Tera-Scale Many-Core Processors M Azimi, D Dai, A Kumar, AS Vaidya Designing Network On-Chip Architectures in the Nanoscale Era, 2010 | 6 | 2010 |
| FPGA-based prototyping of A 2D mesh/torus on-chip interconnect D Dai, A Vaidya, R Saharoy, S Park, D Park, HL Thantry, R Plate, E Maas, ... Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010 | 1 | 2010 |
| On Chip Network Routing for Tera-Scale Architectures AS Vaidya, M Azimi, A Kumar Routing Algorithms in Networks-on-Chip, 379-410, 2014 | | 2014 |
| Router design and evaluation for high-performance interconnects AS Vaidya The Pennsylvania State University, 1999 | | 1999 |
Chita R. DasPenn State UniversityVerified email at cse.psu.edu
