| An energy efficient multi-target binary translator for instruction and data level parallelism exploitation T Knorst, J Vicenzi, MG Jordan, JH Almeida, G Korol, ACS Beck, ... Design Automation for Embedded Systems, 1-28, 2022 | 4 | 2022 |
| On the benefits of Collaborative Thread Throttling and HLS-Versioning in CPU-FPGA Environments T Knorst, G Korol, MG Jordan, JC Vicenzi, A Lorenzon, MB Rutzig, ... 2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems …, 2022 | 3 | 2022 |
| TRIPP: Transparent Resource Provisioning for Multi-Tenant CPU-GPU based Cloud Environments JC Vicenzi, T Knorst, MG Jordan, G Korol, ACS Beck, MB Rutzig 2021 XI Brazilian Symposium on Computing Systems Engineering (SBESC), 1-8, 2021 | 3 | 2021 |
| Unlocking the Full Potential of Heterogeneous Accelerators by Using a Hybrid Multi-Target Binary Translator T Knorst, J Vicenzi, MG Jordan, JH de Almeida, G Korol, ACS Beck, ... 2020 33rd Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2020 | 2 | 2020 |
| Boosting simd benefits through a run-time and energy efficient dlp detection MG Jordan, T Knorst, J Vicenzi, MB Rutzig 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), 722-727, 2019 | 2 | 2019 |
| Hardware accelerator for shapelet distance computation in time-series classification VO Costa, CG de Araujo Gewehr, JC Vicenzi, EA Carara, LL de Oliveira 2020 33rd Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2020 | 1 | 2020 |
| TARA: Enhancing Real-Time Network Traffic Classification with Hardware Virtual Layers JC Vicenzi, MG Jordan, G Korol, T Knorst, MB Rutzig, ACS Beck 2024 37th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems …, 2024 | | 2024 |
| Exploiting Virtual Layers and Pruning for FPGA-Based Adaptive Traffic Classification JC Vicenzi, G Korol, MG Jordan, MB Rutzig, ACS Beck 2024 27th Euromicro Conference on Digital System Design (DSD), 194-201, 2024 | | 2024 |
| Multiprovision: a Design Space Exploration tool for multi-tenant resource provisioning in CPU–GPU environments MG Jordan, JC Vicenzi, T Knorst, G Korol, ACS Beck, MB Rutzig Design Automation for Embedded Systems 27 (4), 241-273, 2023 | | 2023 |
| Dynamic Offloading for Improved Performance and Energy Efficiency in Heterogeneous IoT-Edge-Cloud Continuum JC Vicenzi, G Korol, MG Jordan, WO de Morais, H Ali, EP De Freitas, ... 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 1-6, 2023 | | 2023 |
| Adaptive Inference on Reconfigurable SmartNICs for Traffic Classification JC Vicenzi, G Korol, MG Jordan, MB Rutzig, ACSB Filho International Conference on Advanced Information Networking and Applications …, 2023 | | 2023 |
| Exploiting virtual layers and reconfigurability for FPGA convolutional neural network accelerators JC Vicenzi | | 2023 |
| Dedicated Shapelet Distance Engine for Time-Series Classification. VO Costa, CG de Araujo Gewehr, JC Vicenzi, EA Carara, LL de Oliveira IEEE Des. Test 39 (2), 7-14, 2022 | | 2022 |
| Runtime Vectorization of Conditional Code and Dynamic Range Loops to ARM NEON Engine MG Jordan, T Knorst, J Vicenzi, MB Rutzig 2018 VIII Brazilian Symposium on Computing Systems Engineering (SBESC), 67-74, 2018 | | 2018 |
| SBESC 2021 PROGRAM KS Kappel, C Concatto, E Specht, TL Costa, AK Cechinel, SG Pfleger, ... | | |
