Christopher Batten
Christopher Batten
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Building many-core processor-to-DRAM networks with monolithic CMOS silicon photonics
C Batten, A Joshi, J Orcutt, A Khilo, B Moss, CW Holzwarth, MA Popovic, ...
IEEE Micro 29 (4), 8-21, 2009
Silicon-photonic Clos networks for global on-chip communication
A Joshi, C Batten, YJ Kwon, S Beamer, I Shamim, K Asanovic, ...
3rd ACM/IEEE Int'l Symp. on Networks-on-Chip (NOCS-3), 2009
The vector-thread architecture
R Krashinsky, C Batten, M Hampton, S Gerding, B Pharris, J Casper, ...
31st ACM/IEEE Int'l Symp. on Computer Architecture (ISCA-31), 2004
Exploring the tradeoffs between programmability and efficiency in data-parallel accelerators
Y Lee, R Avizienis, A Bishara, R Xia, D Lockhart, C Batten, K Asanović
38th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA-38), 2011
pStore: A secure peer-to-peer backup system
C Batten, K Barr, A Saraf, S Trepetin
MIT Laboratory for Computer Science Technical Memo, 130-139, 2002
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
S Beamer, C Sun, YJ Kwon, A Joshi, C Batten, V Stojanović, K Asanović
37th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA-37), 2010
Autofocusing and astigmatism correction in the scanning electron microscope
C Batten
MPhil Thesis, Department of Engineering, University of Cambridge, 2000
PyMTL: A Unified Framework for Vertically Integrated Computer Architecture Research
D Lockhart, G Zibrat, C Batten
47th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO-47), 2014
Designing chip-level nanophotonic interconnection networks
C Batten, A Joshi, V Stojanovć, K Asanović
Integrated Optical Interconnect Architectures for Embedded Systems, 81-135, 2013
The Celerity open-source 511-core RISC-V tiered accelerator fabric: Fast architectures and design methodologies for fast chips
S Davidson, S Xie, C Torng, K Al-Hawai, A Rovinski, T Ajayi, L Vega, ...
IEEE Micro 38 (2), 30-41, 2018
Algorithms for automated DNA assembly
D Densmore, THC Hsiau, JT Kittleson, W DeLoache, C Batten, ...
Nucleic acids research 38 (8), 2624-2636, 2010
Enabling Realistic Fine-Grain Voltage Scaling with Reconfigurable Power Distribution Networks
W Godycki, C Torng, I Bukreyev, A Apsel, C Batten
47th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO-47), 2014
Accelerating Irregular Algorithms on GPGPUs Using Fine-Grain Hardware Worklists
JY Kim, C Batten
47th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO-47), 2014
Simplified vector-thread architectures for flexible and efficient data-parallel accelerators
C Batten
PhD Thesis, Department of EECS, Massachusetts Institute of Technology, 2010
Cache refill/access decoupling for vector machines
C Batten, R Krashinsky, S Gerding, K Asanović
37th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO-37), 2004
Microarchitectural Mechanisms to Exploit Value Structure in SIMT Architectures
J Kim, C Torng, S Srinath, D Lockhart, C Batten
40th ACM/IEEE Int'l Symp. on Computer Architecture (ISCA-40), 2013
Architectural specialization for inter-iteration loop dependence patterns
S Srinath, B Ilbeyi, M Tan, G Liu, Z Zhang, C Batten
47th ACM/IEEE Int'l Symp. on Microarchitecture (MICRO-47), 2014
Dynamic hazard resolution for pipelining irregular loops in high-level synthesis
S Dai, R Zhao, G Liu, S Srinath, U Gupta, C Batten, Z Zhang
Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017
An architectural framework for accelerating dynamic parallel algorithms on reconfigurable hardware
T Chen, S Srinath, C Batten, GE Suh
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018
PyMTL3: A Python framework for open-source hardware modeling, generation, simulation, and verification
S Jiang, P Pan, Y Ou, C Batten
IEEE Micro 40 (4), 58-66, 2020
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