Nader Bagherzadeh
Nader Bagherzadeh
Professor of EECS, UC Irvine
Verified email at - Homepage
Cited by
Cited by
MorphoSys: an integrated reconfigurable system for data-parallel and computation-intensive applications
H Singh, MH Lee, G Lu, FJ Kurdahi, N Bagherzadeh, EM Chaves Filho
IEEE transactions on computers 49 (5), 465-481, 2000
Design and implementation of the MorphoSys reconfigurable computing processor
MH Lee, H Singh, G Lu, N Bagherzadeh, FJ Kurdahi, EMC Filho, ...
Journal of VLSI signal processing systems for signal, image and video …, 2000
Novel robust single layer wire crossing approach for exclusive or sum of products logic design with quantum-dot cellular automata
S Angizi, E Alkaldy, N Bagherzadeh, K Navi
Journal of Low Power Electronics 10 (2), 259-271, 2014
Power-aware scheduling under timing constraints for mission-critical embedded systems
J Liu, PH Chou, N Bagherzadeh, F Kurdahi
Proceedings of the 38th annual Design Automation Conference, 840-845, 2001
A wireless network-on-chip design for multicore platforms
C Wang, WH Hu, N Bagherzadeh
2011 19th International Euromicro conference on parallel, distributed and …, 2011
Efficient Mitchell’s approximate log multipliers for convolutional neural networks
MS Kim, AA Del Barrio, LT Oliveira, R Hermida, N Bagherzadeh
IEEE Transactions on Computers 68 (5), 660-675, 2018
A scalable register file architecture for dynamically scheduled processors
S Wallace, N Bagherzadeh
Proceedings of the 1996 Conference on Parallel Architectures and Compilation …, 1996
A framework for reconfigurable computing: Task scheduling and context management
R Maestre, FJ Kurdahi, M Fernández, R Hermida, N Bagherzadeh, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 9 (6), 858-873, 2001
Optimal Ring Embedding in Hypercubes with Faulty Links.
S Latifi, SQ Zheng, N Bagherzadeh
FTCS, 178-184, 1992
Performance study of a multithreaded superscalar microprocessor
M Gulati, N Bagherzadeh
Proceedings. Second International Symposium on High-Performance Computer …, 1996
A variable frequency link for a power-aware network-on-chip (NoC)
SE Lee, N Bagherzadeh
Integration 42 (4), 479-485, 2009
Interactive ray tracing on reconfigurable SIMD MorphoSys
H Du, M Sánchez-Élez, N Tabrizi, N Bagherzadeh, ML Anido, ...
Proceedings of the 2003 Asia and South Pacific Design Automation Conference …, 2003
The MorphoSys parallel reconfigurable system
G Lu, H Singh, MH Lee, N Bagherzadeh, F Kurdahi, EMC Filho
Euro-Par’99 Parallel Processing: 5th International Euro-Par Conference …, 1999
Designing quantum-dot cellular automata counters with energy consumption analysis
S Angizi, MH Moaiyeri, S Farrokhi, K Navi, N Bagherzadeh
Microprocessors and Microsystems 39 (7), 512-520, 2015
A routing and broadcasting scheme on faulty star graphs
N Bagherzadeh, N Nassif, S Latifi
IEEE Transactions on Computers 42 (11), 1398-1403, 1993
MorphoSys: case study of a reconfigurable computing system targeting multimedia applications
H Singh, G Lu, E Filho, R Maestre, MH Lee, F Kurdahi, N Bagherzadeh
Proceedings of the 37th Annual Design Automation Conference, 573-578, 2000
MorphoSys: A reconfigurable architecture for multimedia applications
H Singh, MH Lee, G Lu, FJ Kurdahi, N Bagherzadeh
Proceedings. XI Brazilian Symposium on Integrated Circuit Design (Cat. No …, 1998
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
G Venkataramani, W Najjar, F Kurdahi, N Bagherzadeh, W Bohm
Proceedings of the 2001 International conference on Compilers, architecture …, 2001
Parallel FFT algorithms on network-on-chips
JH Bahn, JS Yang, WH Hu, N Bagherzadeh
Journal of Circuits, Systems, and Computers 18 (02), 255-269, 2009
An energy and cost efficient majority-based RAM cell in quantum-dot cellular automata
MB Khosroshahy, MH Moaiyeri, K Navi, N Bagherzadeh
Results in physics 7, 3543-3551, 2017
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