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Mateus Paiva Fogaça
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Toward an open-source digital flow: First learnings from the openroad project
T Ajayi, VA Chhabria, M Fogaça, S Hashemi, A Hosny, AB Kahng, M Kim, ...
Proceedings of the 56th Annual Design Automation Conference 2019, 1-4, 2019
1692019
OpenROAD: Toward a self-driving, open-source digital layout implementation tool chain
T Ajayi, D Blaauw
Proceedings of Government Microcircuit Applications and Critical Technology …, 2019
1002019
Rsyn: An extensible physical synthesis framework
G Flach, M Fogaça, J Monteiro, M Johann, R Reis
Proceedings of the 2017 ACM on International Symposium on Physical Design, 33-40, 2017
332017
Drive strength aware cell movement techniques for timing driven placement
G Flach, M Fogaça, J Monteiro, M Johann, R Reis
Proceedings of the 2016 on International Symposium on Physical Design, 73-80, 2016
282016
Finding placement-relevant clusters with fast modularity-based clustering
M Fogaça, AB Kahng, R Reis, L Wang
Proceedings of the 24th Asia and South Pacific Design Automation Conference …, 2019
182019
On the superiority of modularity-based clustering for determining placement-relevant clusters
M Fogaca, AB Kahng, E Monteiro, R Reis, L Wang, M Woo
Integration 74, 32-44, 2020
172020
Quadratic timing objectives for incremental timing-driven placement optimization
M Fogaça, G Flach, J Monteiro, M Johann, R Reis
2016 IEEE International Conference on Electronics, Circuits and Systems …, 2016
102016
An incremental timing-driven flow using quadratic formulation for detailed placement
G Flach, J Monteiro, M Fogaça, J Puget, P Butzen, M Johann, R Reis
2015 IFIP/IEEE International Conference on Very Large Scale Integration …, 2015
62015
Contributions to openroad from abroad: experiences and learnings
M Fogaça, E Monteiro, M Danigno, I Oliveira, PF Butzen, R Reis
Proceedings of the 39th International Conference on Computer-Aided Design, 1-8, 2020
42020
Fast and scalable I/O pin assignment with divide-and-conquer and hungarian matching
V Bandeira, M Fogaça, EM Monteiro, I Oliveira, M Woo, R Reis
2020 18th IEEE International New Circuits and Systems Conference (NEWCAS), 74-77, 2020
42020
Proposal and evaluation of pin access algorithms for detailed routing
M Danigno, P Butzen, J Ferreira, A Oliveira, E Monteiro, M Fogaça, R Reis
2019 26th IEEE international conference on electronics, circuits and systems …, 2019
42019
Routing-aware incremental timing-driven placement
J Monteiro, NK Darav, G Flach, M Fogaça, R Reis, A Kennings, M Johann, ...
2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 290-295, 2016
42016
A review of machine learning in logic synthesis
AAS Berndt, M Fogaça, C Meinhardt
Journal of Integrated Circuits and Systems 17 (3), 1-12, 2022
32022
Circuit design routing based on routing demand adjustment
MP Fogaça, G Posser, C Wing-Kai, MC Yildiz, Z Li
US Patent 11,461,530, 2022
2022
Algorithms for Access Point Selection at Pre-Routing Stage
MF Danigno, M Fogaça, E Monteiro, J Ferreira, A Oliveira, R Reis, ...
Journal of Integrated Circuits and Systems 16 (2), 1-8, 2021
2021
Finding placement-relevant clustersWith fast modularity-based clustering
MP Fogaça
2020
Improving placement algorithms by using visualization tools
M Fogaça, G Flach, M Johann, R Reis
2016 14th IEEE International New Circuits and Systems Conference (NEWCAS), 1-4, 2016
2016
A new quadratic formulation for incremental timing-driven placement
MP Fogaça
2016
Proposta de Ferramenta para o Auxílio no Aprendizado de Memória Cache em Arquitetura de Computadores
M Fogaça, A Vargas, C Meinhardt
Anais do Computer on the Beach 4, 337-339, 2013
2013
Rsyn–A Physical Synthesis Framework for Research and Education
M Fogaça, J Monteiro, M Johann, R Reis
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Articles 1–20