| Adaptively Compressing {IoT} Data on the Resource-constrained Edge T Lu, W Xia, X Zou, Q Xia 3rd USENIX Workshop on Hot Topics in Edge Computing (HotEdge 20), 2020 | 18 | 2020 |
| High-performance and endurable cache management for flash-based read caching Q Xia, W Xiao IEEE Transactions on Parallel and Distributed Systems 27 (12), 3518-3531, 2016 | 16 | 2016 |
| Flash-aware high-performance and endurable cache Q Xia, W Xiao 2015 IEEE 23rd International Symposium on Modeling, Analysis, and Simulation …, 2015 | 9 | 2015 |
| Improving mlc flash performance with workload-aware differentiated ecc Q Xia, W Xiao 2016 IEEE 22nd International Conference on Parallel and Distributed Systems …, 2016 | 5 | 2016 |
| Design Of Combinational Sum Adders Based On Multiple-Valued Logic H WU, Z Shunan, X QU, Q XIA, C Yueyang | 2 | 2011 |
| Locality-Driven Dynamic Flash Cache Allocation L Xu, Q Xia, W Xiao 2017 IEEE 15th Intl Conf on Dependable, Autonomic and Secure Computing, 15th …, 2017 | 1 | 2017 |
| Design of quaternary logic circuits based on source-coupled logic HX Wu, XN Qu, QL Cai, QB Xia, SA Zhong Journal of Beijing Institute of Technology 22 (1), 49-54, 2013 | 1 | 2013 |
| Design of quaternary logic circuits based on multiple-valued current mode H Wu, S Zhong, Q Cai, Q Xia, Y Chen Electrical, Information Engineering and Mechatronics 2011: Proceedings of …, 2012 | 1 | 2012 |
| Design of a conditional sum adder based on multiple-valued logic W Haixia, Z Shunan, Q Xiaonan, X Qianbin, C Yueyang 2011 International Conference on Electronics, Communications and Control …, 2011 | 1 | 2011 |
| Towards Design and Analysis For High-Performance and Reliable SSDs Q Xia Virginia Commonwealth University, 2017 | | 2017 |
| Zero-Migration Garbage Collection Scheme for Flash Read Cache (Poster) QXW Xiao The 24th International Conference on Parallel Architectures and Compilation …, 2015 | | 2015 |
| A 8 bit conditional sum adder based on multiple-valued logic HX Wu, XN Qu, XL Zhao, SA Zhong, QB Xia Transactions of Beijing Institute of Technology 32 (6), 2012 | | 2012 |
| Design of High Performance On-Chip Bus Based on Multiple-Valued Logic HX Wu, QB Xia, M Sheng, QF Xie, SA Zhong, YY Chen Transactions of Beijing institute of Technology, 1061-1064, 2012 | | 2012 |
