| A review of selected topics in physics based modeling for tunnel field-effect transistors D Esseni, M Pala, P Palestri, C Alper, T Rollo Semiconductor Science and Technology 32 (8), 083005, 2017 | 93 | 2017 |
| A steep-slope transistor combining phase-change and band-to-band-tunneling to achieve a sub-unity body factor WA Vitale, EA Casu, A Biswas, T Rosca, C Alper, A Krammer, GV Luong, ... Scientific reports 7 (1), 355, 2017 | 74 | 2017 |
| Assessment of field-induced quantum confinement in heterogate germanium electron–hole bilayer tunnel field-effect transistor JL Padilla, C Alper, F Gámiz, AM Ionescu Applied Physics Letters 105 (8), 2014 | 49 | 2014 |
| Quantum mechanical study of the germanium electron–hole bilayer tunnel FET C Alper, L Lattanzio, L De Michielis, P Palestri, L Selmi, AM Ionescu IEEE transactions on electron devices 60 (9), 2754-2760, 2013 | 49 | 2013 |
| Tunnel FET with non-uniform gate capacitance for improved device and circuit level performance C Alper, L De Michielis, N Dağtekin, L Lattanzio, D Bouvet, AM Ionescu Solid-State Electronics 84, 205-210, 2013 | 48 | 2013 |
| Impact of asymmetric configurations on the heterogate germanium electron–hole bilayer tunnel FET including quantum confinement JL Padilla, C Alper, A Godoy, F Gámiz, AM Ionescu IEEE Transactions on Electron Devices 62 (11), 3560-3566, 2015 | 33 | 2015 |
| Confinement-induced InAs/GaSb heterojunction electron–hole bilayer tunneling field-effect transistor JL Padilla, C Medina-Bailon, C Alper, F Gamiz, AM Ionescu Applied Physics Letters 112 (18), 2018 | 29 | 2018 |
| The electron-hole bilayer TFET: Dimensionality effects and optimization C Alper, P Palestri, JL Padilla, AM Ionescu IEEE Transactions on Electron Devices 63 (6), 2603-2609, 2016 | 25 | 2016 |
| Hybrid phase-change—Tunnel FET (PC-TFET) switch with subthreshold swing< 10mV/decade and sub-0.1 body factor: Digital and analog benchmarking EA Casu, WA Vitale, N Oliva, T Rosca, A Biswas, C Alper, A Krammer, ... 2016 IEEE International Electron Devices Meeting (IEDM), 19.3. 1-19.3. 4, 2016 | 23 | 2016 |
| Two dimensional quantum mechanical simulation of low dimensional tunneling devices C Alper, P Palestri, L Lattanzio, JL Padilla, AM Ionescu Solid-State Electronics 113, 167-172, 2015 | 21 | 2015 |
| Benchmarking of homojunction strained-Si NW tunnel FETs for basic analog functions A Biswas, GV Luong, MF Chowdhury, C Alper, QT Zhao, F Udrea, S Mantl, ... IEEE transactions on electron devices 64 (4), 1441-1448, 2017 | 17 | 2017 |
| Underlap counterdoping as an efficient means to suppress lateral leakage in the electron–hole bilayer tunnel FET C Alper, P Palestri, JL Padilla, AM Ionescu Semiconductor Science and Technology 31 (4), 045001, 2016 | 16 | 2016 |
| Assessment of pseudo-bilayer structures in the heterogate germanium electron-hole bilayer tunnel field-effect transistor JL Padilla, C Alper, C Medina-Bailón, F Gámiz, AM Ionescu Applied Physics Letters 106 (26), 2015 | 16 | 2015 |
| A novel reconfigurable sub-0.25-V digital logic family using the electron-hole bilayer TFET C Alper, JL Padilla, P Palestri, AM Ionescu IEEE Journal of the Electron Devices Society 6, 2-7, 2017 | 15 | 2017 |
| Semiconductor tunneling device C Alper, L Lattanzio, MA Ionescu, L De Michielis, N Dagtekin US Patent 9,768,311, 2017 | 13 | 2017 |
| Implementation of band-to-band tunneling phenomena in a multisubband ensemble Monte Carlo simulator: application to silicon TFETs C Medina-Bailon, JL Padilla, C Sampedro, C Alper, F Gamiz, AM Ionescu IEEE Transactions on Electron Devices 64 (8), 3084-3091, 2017 | 11 | 2017 |
| Impact of device geometry of the fin electron-hole bilayer tunnel FET C Alper, JL Padilla, P Palestri, AM Ionescu 2016 46th European Solid-State Device Research Conference (ESSDERC), 307-310, 2016 | 10 | 2016 |
| Switching behavior constraint in the heterogate electron–hole bilayer tunnel FET: The combined interplay between quantum confinement effects and asymmetric configurations JL Padilla, C Alper, F Gamiz, AM Ionescu IEEE Transactions on Electron Devices 63 (6), 2570-2576, 2016 | 9 | 2016 |
| Modeling the imaginary branch in III–V tunneling devices: Effective mass vs k· p C Alper, M Visciarelli, P Palestri, JL Padilla, A Gnudi, E Gnani, ... 2015 International Conference on Simulation of Semiconductor Processes and …, 2015 | 9 | 2015 |
| Conformal mapping based DC current model for double gate tunnel FETs A Biswas, L De Michielis, C Alper, AM Ionescu 2014 15th International Conference on Ultimate Integration on Silicon (ULIS …, 2014 | 8 | 2014 |
