| A concurrent testing method for NoC switches M Hosseinabady, A Banaiyan, MN Bojnordi, Z Navabi Proceedings of the Design Automation & Test in Europe Conference 1, 6 pp., 2006 | 70 | 2006 |
| Using the inter-and intra-switch regularity in NoC switch testing M Hosseinabady, A Dalirsani, Z Navabi 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 56 | 2007 |
| Simultaneous reduction of dynamic and static power in scan structures S Sharifi, J Jaffari, M Hosseinabady, A Afzali-Kusha, Z Navabi Design, Automation and Test in Europe, 846-851, 2005 | 48 | 2005 |
| Reliable network-on-chip based on generalized de Bruijn graph M Hosseinabady, MR Kakoee, J Mathew, DK Pradhan 2007 IEEE International High Level Design Validation and Test Workshop, 3-10, 2007 | 46 | 2007 |
| Energy optimization in commercial FPGAs with voltage, frequency and logic scaling JL Nunez-Yanez, M Hosseinabady, A Beldachi IEEE Transactions on Computers 65 (5), 1484-1493, 2015 | 42 | 2015 |
| Run-time power gating in hybrid ARM-FPGA devices M Hosseinabady, JL Nunez-Yanez 2014 24th International Conference on Field Programmable Logic and …, 2014 | 40 | 2014 |
| An analytical model for reliability evaluation of NoC architectures A Dalirsani, M Hosseinabady, Z Navabi 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 49-56, 2007 | 40 | 2007 |
| A streaming dataflow engine for sparse matrix-vector multiplication using high-level synthesis M Hosseinabady, JL Nunez-Yanez IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 35 | 2019 |
| Simultaneous multiprocessing in a software-defined heterogeneous FPGA J Nunez-Yanez, S Amiri, M Hosseinabady, A Rodríguez, R Asenjo, ... The Journal of Supercomputing 75, 4078-4095, 2019 | 29* | 2019 |
| Low latency and energy efficient scalable architecture for massive NoCs using generalized de Bruijn graph M Hosseinabady, MR Kakoee, J Mathew, DK Pradhan IEEE transactions on very large scale integration (VLSI) systems 19 (8 …, 2010 | 25 | 2010 |
| Fault-tolerant dynamically reconfigurable noc-based soc M Hosseinabady, J Nunez-Yanez 2008 International Conference on Application-Specific Systems, Architectures …, 2008 | 19 | 2008 |
| Single event upset detection and correction J Singh, J Mathew, M Hosseinabady, DK Pradhan 10th International Conference on Information Technology (ICIT 2007), 13-18, 2007 | 19 | 2007 |
| Multi-precision convolutional neural networks on heterogeneous hardware S Amiri, M Hosseinabady, S McIntosh-Smith, J Nunez-Yanez 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 419-424, 2018 | 18 | 2018 |
| Run-time stochastic task mapping on a large scale network-on-chip with dynamically reconfigurable tiles M Hosseinabady, JL Nunez-Yanez IET computers & digital techniques 6 (1), 1-11, 2012 | 18 | 2012 |
| Energy optimization of FPGA-based stream-oriented computing with power gating M Hosseinabady, JL Nunez-Yanez 2015 25th International Conference on Field Programmable Logic and …, 2015 | 14 | 2015 |
| Single-event transient analysis in high speed circuits M Hosseinabady, P Lotfi-Kamran, J Mathew, S Mohanty, D Pradhan 2011 International Symposium on Electronic System Design, 112-117, 2011 | 13 | 2011 |
| Fault tolerant bit parallel finite field multipliers using LDPC codes J Mathew, J Singh, AM Jabir, M Hosseinabady, DK Pradhan 2008 IEEE International Symposium on Circuits and Systems (ISCAS), 1684-1687, 2008 | 13 | 2008 |
| Heterogeneous FPGA+ GPU embedded systems: Challenges and opportunities M Hosseinabady, MAB Zainol, J Nunez-Yanez arXiv preprint arXiv:1901.06331, 2019 | 12 | 2019 |
| Optimised OpenCL workgroup synthesis for hybrid ARM-FPGA devices M Hosseinabady, JL Nunez-Yanez 2015 25th International Conference on Field Programmable Logic and …, 2015 | 12 | 2015 |
| Single-event upset analysis and protection in high speed circuits M Hosseinabady, P Lotfi-Kamran, G Di Natale, S Di Carlo, A Benso, ... Eleventh IEEE European Test Symposium (ETS'06), 29-34, 2006 | 12 | 2006 |
