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Santosh Ghosh
Santosh Ghosh
IIT Kharagpur India and KU Leuven Belgium and Intel Labs US
Verified email at intel.com
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Cited by
Cited by
Year
X-DeepSCA: Cross-device deep learning side channel attack
D Das, A Golder, J Danial, S Ghosh, A Raychowdhury, S Sen
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
802019
High efficiency power side-channel attack immunity using noise injection in attenuated signature domain
D Das, S Maity, SB Nasir, S Ghosh, A Raychowdhury, S Sen
2017 IEEE International Symposium on Hardware Oriented Security and Trust…, 2017
682017
Petrel: Power and Timing Attack Resistant Elliptic Curve Scalar Multiplier Based on ProgrammableArithmetic Unit
S Ghosh, D Mukhopadhyay, D Roychowdhury
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (8), 1798-1812, 2011
662011
ASNI: Attenuated signature noise injection for low-overhead power side-channel attack immunity
D Das, S Maity, SB Nasir, S Ghosh, A Raychowdhury, S Sen
IEEE Transactions on Circuits and Systems I: Regular Papers 65 (10), 3300-3311, 2018
642018
STELLAR: A generic EM side-channel attack protection through ground-up root-cause analysis
D Das, M Nath, B Chatterjee, S Ghosh, S Sen
2019 IEEE International Symposium on Hardware Oriented Security and Trust…, 2019
522019
Parallel crypto-devices for GF (p) elliptic curve multiplication resistant against side channel attacks
S Ghosh, M Alam, DR Chowdhury, IS Gupta
Computers & Electrical Engineering 35 (2), 329-338, 2009
512009
High speed flexible pairing cryptoprocessor on FPGA platform
S Ghosh, D Mukhopadhyay, D Roychowdhury
International Conference on Pairing-Based Cryptography, 450-466, 2010
492010
A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS
T Karnik, D Kurian, P Aseron, R Dorrance, E Alpman, A Nicoara, R Popov, ...
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 46-48, 2018
472018
Secure JTAG implementation using Schnorr protocol
A Das, J Da Rolt, S Ghosh, S Seys, S Dupuis, G Di Natale, ML Flottes, ...
Journal of Electronic Testing 29 (2), 193-209, 2013
462013
Practical approaches toward deep-learning-based cross-device power side-channel attack
A Golder, D Das, J Danial, S Ghosh, S Sen, A Raychowdhury
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (12…, 2019
402019
Security analysis of industrial test compression schemes
A Das, B Ege, S Ghosh, L Batina, I Verbauwhede
IEEE transactions on computer-aided design of integrated circuits and…, 2013
402013
Towards efficient and automated side channel evaluations at design time
D Sijacic, J Balasch, B Yang, S Ghosh, I Verbauwhede
Kalpa Publications in Computing 7, 16-31, 2018
33*2018
A speed area optimized embedded co-processor for McEliece cryptosystem
S Ghosh, J Delvaux, L Uhsadel, I Verbauwhede
2012 IEEE 23rd International Conference on Application-Specific Systems…, 2012
322012
27.3 EM and power SCA-resilient AES-256 in 65nm cmos through> 350 current-domain signature attenuation
D Das, J Danial, A Golder, N Modak, S Maity, B Chatterjee, D Seo, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 424-426, 2020
302020
High Speed Cryptoprocessor for ηT Pairing on 128-bit Secure Supersingular Elliptic Curves over Characteristic Two Fields
S Ghosh, D Roychowdhury, A Das
International Workshop on Cryptographic Hardware and Embedded Systems, 442-458, 2011
292011
Effect of glitches against masked AES S-box implementation and countermeasure
M Alam, S Ghosh, MJ Mohan, D Mukhopadhyay, DR Chowdhury, ...
IET Information Security 3 (1), 34-44, 2009
272009
Secure dual-core cryptoprocessor for pairings over barreto-naehrig curves on fpga platform
S Ghosh, D Mukhopadhyay, D Roychowdhury
IEEE transactions on very large scale integration (VLSI) systems 21 (3), 434-442, 2012
262012
Differential scan attack on AES with X-tolerant and X-masked test response compactor
B Ege, A Das, S Gosh, I Verbauwhede
2012 15th Euromicro Conference on Digital System Design, 545-552, 2012
252012
Core based architecture to speed up optimal ate pairing on FPGA platform
S Ghosh, I Verbauwhede, D Roychowdhury
International Conference on Pairing-Based Cryptography, 141-159, 2012
252012
Fault Attack, Countermeasures on Pairing Based Cryptography.
S Ghosh, D Mukhopadhyay, DR Chowdhury
Int. J. Netw. Secur. 12 (1), 21-28, 2011
252011
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