| Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing J Albericio, P Judd, T Hetherington, T Aamodt, N Enright Jerger, ... International Symposium on Computer Architecture, 2016 | 912 | 2016 |
| Outstanding research problems in NoC design: system, microarchitecture, and circuit perspectives R Marculescu, UY Ogras, LS Peh, N Enright Jerger, Y Hoskote Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2009 | 912 | 2009 |
| On-chip networks N Enright Jerger, LS Peh Synthesis Lectures on Computer Architecture 4 (1), 1-141, 2009 | 327* | 2009 |
| Virtual circuit tree multicasting: A case for on-chip hardware multicast support N Enright Jerger, LS Peh, M Lipasti Computer Architecture, 2008. ISCA'08. 35th International Symposium on, 229-240, 2008 | 318* | 2008 |
| DBAR: an efficient routing algorithm to support multiple concurrent applications in networks-on-chip S Ma, N Enright Jerger, Z Wang Computer Architecture (ISCA), 2011 38th Annual International Symposium on …, 2011 | 224 | 2011 |
| Load Value Approximation J San Miguel, M Badr, N Enright Jerger Microarchitecture (MICRO), 2014 47th Annual IEEE/ACM International Symposium …, 2014 | 223 | 2014 |
| On-Chip Networks N Enright Jerger, T Krishna, LS Peh Synthesis Lectures on Computer Architecture 12 (3), 1-210, 2017 | 216* | 2017 |
| Scarab: A single cycle adaptive routing and bufferless network M Hayenga, N Enright Jerger, M Lipasti Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009 | 211 | 2009 |
| Achieving predictable performance through better memory controller placement in many-core CMPs D Abts, ND Enright Jerger, J Kim, D Gibson, MH Lipasti ACM SIGARCH Computer Architecture News 37 (3), 451-461, 2009 | 211 | 2009 |
| Enabling interposer-based disintegration of multi-core processors A Kannan, N Enright Jerger, GH Loh Proceedings of the 48th International Symposium on Microarchitecture, 546-558, 2015 | 197 | 2015 |
| Circuit-Switched Coherence N Enright Jerger, M Lipasti, LS Peh IEEE Computer Architecture Letters, v. 6 n. 1, 2007 | 190* | 2007 |
| Circuit-switched coherence ND Enright Jerger, LS Peh, MH Lipasti Proceedings of the Second ACM/IEEE International Symposium on Networks-on …, 2008 | 189* | 2008 |
| Doppelgänger: a cache for approximate computing J San Miguel, J Albericio, A Moshovos, N Enright Jerger Proceedings of the 48th International Symposium on Microarchitecture, 50-61, 2015 | 168 | 2015 |
| SynFull: synthetic traffic models capturing cache coherent behaviour M Badr, N Enright Jerger Computer Architecture (ISCA), 2014 ACM/IEEE 41st International Symposium on …, 2014 | 146 | 2014 |
| Reduced-Precision Strategies for Bounded Memory in Deep Neural Nets P Judd, J Albericio, T Hetherington, T Aamodt, N Enright Jerger, ... arXiv preprint arXiv:1511.05236, 2015 | 135 | 2015 |
| MEMORY IN DEEP NEURAL NETS P Judd, J Albericio, T Hetherington, T Aamodt, N Enright Jerger, ... arXiv preprint arXiv:1511.05236, 2015 | 135 | 2015 |
| Proteus: Exploiting Numerical Precision Variability in Deep Neural Networks P Judd, J Albericio, T Hetherington, T Aamodt, N Enright Jerger, ... Workshop on Approximate Computing, 2016 | 127 | 2016 |
| NoC Architectures for Silicon Interposer Systems: Why Pay for more Wires when you Can Get them (from your interposer) for Free? N Enright Jerger, A Kannan, Z Li, GH Loh Microarchitecture (MICRO), 2014 47th Annual IEEE/ACM International Symposium …, 2014 | 127* | 2014 |
| Modular Routing Design for Chiplet-based Systems J Yin, Z Lin, O Kayiran, M Poremba, MSB Altaf, N Enright Jerger, GH Loh International Symposium on Computer Architecture, 2018 | 126 | 2018 |
| Whole Packet Forwarding: Efficient Design of Fully Adaptive Routing Algorithms for Networks-on-Chip S Ma, N Enright Jerger, Z Wang International Symposium on High Performance Computer Architecture, 2012 | 111 | 2012 |
