| Slice-processors: an implementation of operation-based prediction A Moshovos, DN Pnevmatikatos, A Baniasadi Proceedings of the 15th international conference on Supercomputing, 321-334, 2001 | 148 | 2001 |
| Instruction distribution heuristics for quad-cluster, dynamically-scheduled, superscalar processors A Baniasadi, A Moshovos Proceedings of the 33rd annual ACM/IEEE international symposium on …, 2000 | 122 | 2000 |
| Instruction flow-based front-end throttling for power-aware high-performance processors A Baniasadi, A Moshovos Proceedings of the 2001 international symposium on Low power electronics and …, 2001 | 98 | 2001 |
| Branch predictor prediction: A power-aware branch predictor for high-performance processors A Baniasadi, A Moshovos Proceedings. IEEE International Conference on Computer Design: VLSI in …, 2002 | 48 | 2002 |
| SEPAS: A highly accurate energy-efficient branch predictor A Baniasadi, A Moshovos Proceedings of the 2004 international symposium on Low power electronics and …, 2004 | 44 | 2004 |
| Using GIS in explaining spatial distribution of brucellosis in an endemic district in Iran AA HAGHDOUST, L Kawaguchi, ALI MIRZAZADEH, H Rashidi, ... IRANIAN JOURNAL OF PUBLIC HEALTH 36 (1), 27-34, 2007 | 41 | 2007 |
| Exploiting task temperature profiling in temperature-aware task scheduling for computational clusters DC Vanderster, A Baniasadi, NJ Dimopoulos Asia-Pacific Conference on Advances in Computer Systems Architecture, 175-185, 2007 | 32 | 2007 |
| Performance in GPU architectures: Potentials and distances A Lashgar, A Baniasadi 9th Annual Workshop on Duplicating, Deconstructing, and Debunking (WDDD 2011 …, 2011 | 29 | 2011 |
| A New Cell Design Methodology for Balanced XOR–XNOR Circuits for Hybrid-CMOS Logic T Nikoubin, F Eslami, A Baniasadi, K Navi Journal of Low Power Electronics 5 (4), 474-483, 2009 | 23 | 2009 |
| History-aware, resource-based dynamic scheduling for heterogeneous multi-core processors AZ Jooya, A Baniasadi, M Analoui intervals 800, 1200, 2011 | 21 | 2011 |
| Improving energy-efficiency by bypassing trivial computations E Atoofian, A Baniasadi 19th IEEE International Parallel and Distributed Processing Symposium, 7 pp., 2005 | 19 | 2005 |
| Asymmetric-frequency clustering: a power-aware back-end for high-performance processors A Baniasadi, A Moshovos Proceedings of the 2002 international symposium on Low power electronics and …, 2002 | 18 | 2002 |
| IPMACC: open source openacc to cuda/opencl translator A Lashgar, A Majidi, A Baniasadi arXiv preprint arXiv:1412.1127, 2014 | 16 | 2014 |
| Dynamic warp resizing: Analysis and benefits in high-performance SIMT A Lashgar, A Baniasadi, A Khonsari 2012 IEEE 30th International Conference on Computer Design (ICCD), 502-503, 2012 | 16 | 2012 |
| Employing software-managed caches in OpenACC: Opportunities and benefits A Lashgar, A Baniasadi ACM Transactions on Modeling and Performance Evaluation of Computing Systems …, 2016 | 15 | 2016 |
| System-level vulnerability estimation for data caches A Haghdoost, H Asadi, A Baniasadi 2010 IEEE 16th Pacific Rim International Symposium on Dependable Computing …, 2010 | 15 | 2010 |
| A power-aware prediction-based cache coherence protocol for chip multiprocessors E Atoofian, A Baniasadi 2007 IEEE International Parallel and Distributed Processing Symposium, 1-8, 2007 | 13 | 2007 |
| Reducing execution unit leakage power in embedded processors H Homayoun, A Baniasadi International Workshop on Embedded Computer Systems, 299-308, 2006 | 13 | 2006 |
| Multiobjective GPU design space exploration optimization A Jooya, N Dimopoulos, A Baniasadi Microprocessors and Microsystems 69, 198-210, 2019 | 12 | 2019 |
| Inter-warp instruction temporal locality in deep-multithreaded GPUs A Lashgar, A Baniasadi, A Khonsari Architecture of Computing Systems–ARCS 2013: 26th International Conference …, 2013 | 12 | 2013 |
