| Density tradeoffs of non-volatile memory as a replacement for SRAM based last level cache K Korgaonkar, I Bhati, H Liu, J Gaur, S Manipatruni, S Subramoney, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 68 | 2018 |
| The Implications of Shared Data Synchronization Techniques on {Multi-Core} Energy {Efficiency} A Gautham, K Korgaonkar, P Slpsk, S Balachandran, K Veezhinathan 2012 Workshop on Power-Aware Computing and Systems (HotPower 12), 2012 | 34 | 2012 |
| The bitlet model: A parameterized analytical model to compare PIM and CPU systems R Ronen, A Eliahu, O Leitersdorf, N Peled, K Korgaonkar, ... ACM Journal on Emerging Technologies in Computing Systems (JETC) 18 (2), 1-29, 2022 | 22 | 2022 |
| Characterization of user’s behavior variations for design of replayable mobile workloads S Patil, Y Kim, K Korgaonkar, I Awwal, TS Rosing Mobile Computing, Applications, and Services: 7th International Conference …, 2015 | 14 | 2015 |
| Write congestion aware bypass for non-volatile memory, last level cache (LLC) dropping from write queue responsive to write queue being full and read queue threshold wherein … IS Bhati, H Liu, J Gaur, K Korgaonkar, S Manipatruni, S Subramoney, ... US Patent 10,331,582, 2019 | 12 | 2019 |
| Smart Communications for Power Consumption Information A Ambati, KK Korgaonkar, M Madhavan, RV Polavarapu US Patent App. 13/213,254, 2013 | 10 | 2013 |
| Vorpal: Vector clock ordering for large persistent memory systems K Korgaonkar, J Izraelevitz, J Zhao, S Swanson Proceedings of the 2019 ACM Symposium on Principles of Distributed Computing …, 2019 | 9 | 2019 |
| Incremental preparation of videos for delivery M Chetlur, U Devi, S Kalyanaraman, R Kokku, K Korgaonkar US Patent 9,152,220, 2015 | 8 | 2015 |
| The bitlet model: Defining a litmus test for the bitwise processing-in-memory paradigm K Korgaonkar, R Ronen, A Chattopadhyay, S Kvatinsky arXiv preprint arXiv:1910.10234, 2019 | 5 | 2019 |
| Density tradeoffs of non-volatile memory as a replacement for SRAM based last level cache. In 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA) K Korgaonkar, I Bhati, H Liu, J Gaur, S Manipatruni, S Subramoney, ... IEEE, 315ś327, 2018 | 5 | 2018 |
| Method and apparatus for reducing write congestion in non-volatile memory based last level caches KK Korgaonkar, IS Bhati, H Liu, J Gaur, S Manipatruni, S Subramoney, ... US Patent App. 15/475,197, 2018 | 4 | 2018 |
| Size-proportional signature sharing for transactional memory systems K Korgaonkar, K Garimella, K Veezhinathan FASPP workshop, 2012 | 3 | 2012 |
| A Data-Centric Approach for Analyzing Large-Scale Deep Learning Applications SS Vineet, NM Joseph, K Korgaonkar, A Paul Proceedings of the 24th International Conference on Distributed Computing …, 2023 | 1 | 2023 |
| To cache or to bypass? A fine balance in the emerging memory technology era K Korgaonkar, I Bhati, H Liu, J Gaur, S Manipatruni, S Subramoney, ... NVM, 2019 | 1 | 2019 |
| Reconstructing hardware transactional memory for workload optimized systems K Korgaonkar, P Jain, D Tomar, K Garimella, V Kamakoti Advanced Parallel Processing Technologies: 9th International Symposium, APPT …, 2011 | 1 | 2011 |
| Characteristics of Deep Learning Workloads in Industry, Academic Institutions and National Laboratories NM Joseph, SS Vineet, K Korgaonkar, A Paul Proceedings of the 24th International Conference on Distributed Computing …, 2023 | | 2023 |
| VLSI-SoC: Design Trends: 28th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2020, Salt Lake City, UT, USA, October 6–9, 2020, Revised and … A Calimera, PE Gaillardon, K Korgaonkar, S Kvatinsky, R Reis Springer Nature, 2021 | | 2021 |
| The Bitlet Model K Korgaonkar, R Ronen, A Chattopadhyay, S Kvatinsky arXiv preprint arXiv:2107.10308, 2021 | | 2021 |
| Building Scalable Architectures Using Emerging Memory Technologies KK Korgaonkar University of California, San Diego, 2019 | | 2019 |
| Optimizing streaming of a group of videos V Arya, M Chetlur, P Dutta, S Kalyanaraman, KK Korgaonkar, ... US Patent 9,060,205, 2015 | | 2015 |
