Follow
Pu Liu
Pu Liu
Verified email at cadence.com
Title
Cited by
Cited by
Year
A systematic method for functional unit power estimation in microprocessors
W Wu, L Jin, J Yang, P Liu, SXD Tan
Proceedings of the 43rd annual Design Automation Conference, 554-557, 2006
952006
Fast thermal simulation for architecture level dynamic thermal management
P Liu, Z Qi, H Li, L Jin, W Wu, SXD Tan, J Yang
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005
642005
Efficient power modeling and software thermal sensing for runtime temperature monitoring
W Wu, L Jin, J Yang, P Liu, SXD Tan
ACM Transactions on Design Automation of Electronic Systems (TODAES) 12 (3 …, 2008
542008
An efficient method for terminal reduction of interconnect circuits considering delay variations
P Liu, SXD Tan, H Li, Z Qi, J Kong, B McGaughy, L He
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005
492005
Fast thermal simulation for runtime temperature tracking and management
P Liu, H Li, L Jin, W Wu, SXD Tan, J Yang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
412006
An efficient terminal and model order reduction algorithm
P Liu, SXD Tan, B Yan, B McGaughy
Integration 41 (2), 210-218, 2008
362008
Efficient thermal simulation for run-time temperature tracking and management
H Li, P Liu, Z Qi, L Jin, W Wu, SXD Tan, J Yang
2005 International Conference on Computer Design, 130-133, 2005
352005
Termmerg: an efficient terminal-reduction method for interconnect circuits
P Liu, SXD Tan, B McGaughy, L Wu, L He
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007
262007
Stochastic extended Krylov subspace method for variational analysis of on-chip power grid networks
N Mi, SXD Tan, P Liu, J Cui, Y Cai, X Hong
2007 IEEE/ACM International Conference on Computer-Aided Design, 48-53, 2007
242007
SBPOR: second-order balanced truncation for passive order reduction of RLC circuits
B Yan, SXD Tan, P Liu, B McGaughy
Proceedings of the 44th annual Design Automation Conference, 158-161, 2007
242007
An extended SVD-based terminal and model order reduction algorithm
P Liu, S X-d Tan, B Yan, B McGaughy
2006 IEEE International Behavioral Modeling and Simulation Workshop, 44-49, 2006
222006
Passive interconnect macromodeling via balanced truncation of linear systems in descriptor form
B Yan, SXD Tan, P Liu, B McGaughy
2007 Asia and South Pacific Design Automation Conference, 355-360, 2007
192007
Passive hierarchical model order reduction and realization of rlcm circuits
P Liu, Z Qi, SXD Tan
Sixth international symposium on quality electronic design (isqed'05), 603-608, 2005
72005
Compact reduced order modeling for multiple-port interconnects
P Liu, SXD Tan, B McGaughy, L Wu
7th International Symposium on Quality Electronic Design (ISQED'06), 6 pp.-418, 2006
62006
A general method for multi-port active network reduction and realization
P Liu, Z Qi, A Aviles, SXD Tan
BMAS 2005. Proceedings of the 2005 IEEE International Behavioral Modeling …, 2005
62005
Passive modeling of interconnects by waveform shaping
B Yan, P Liu, SXD Tan, B McGaughy
8th International Symposium on Quality Electronic Design (ISQED'07), 356-361, 2007
52007
A fast architecture-level thermal analysis method for runtime thermal regulation
SXD Tan, P Liu, L Jiang, W Wu, M Tirumala
Journal of Low Power Electronics 4 (2), 139-148, 2008
32008
Fekis: A fast architecture-level thermal analyzer for online thermal regulation
P Liu, SXD Tan, W Wu, M Tirumala
Proceedings of the 18th ACM Great Lakes symposium on VLSI, 411-416, 2008
12008
Efficient analog circuit modeling by Boolean logic operations
Z Qi, SXD Tan, P Liu
BMAS 2005. Proceedings of the 2005 IEEE International Behavioral Modeling …, 2005
12005
Advanced model reduction and simulation techniques for integrated electronic and thermal circuits
P Liu
University of California, Riverside, 2008
2008
The system can't perform the operation now. Try again later.
Articles 1–20