| EGRA: A coarse grained reconfigurable architectural template G Ansaloni, P Bonzini, L Pozzi IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (6 …, 2010 | 141 | 2010 |
| Approximate logic synthesis: A survey I Scarabottolo, G Ansaloni, GA Constantinides, L Pozzi, S Reda Proceedings of the IEEE 108 (12), 2195-2213, 2020 | 106 | 2020 |
| Lattice-traversing design space exploration for high level synthesis L Ferretti, G Ansaloni, L Pozzi 2018 IEEE 36th International Conference on Computer Design (ICCD), 210-217, 2018 | 58 | 2018 |
| Circuit carving: A methodology for the design of approximate hardware I Scarabottolo, G Ansaloni, L Pozzi 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 545-550, 2018 | 56 | 2018 |
| Cluster-based heuristic for high level synthesis design space exploration L Ferretti, G Ansaloni, L Pozzi IEEE Transactions on Emerging Topics in Computing 9 (1), 35-43, 2018 | 49 | 2018 |
| Ultra-low power design of wearable cardiac monitoring systems R Braojos, H Mamaghanian, AD Junior, G Ansaloni, D Atienza, FJ Rincón, ... Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 44 | 2014 |
| Leveraging prior knowledge for effective design-space exploration in high-level synthesis L Ferretti, J Kwon, G Ansaloni, G Di Guglielmo, LP Carloni, L Pozzi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020 | 43 | 2020 |
| HEAL-WEAR: An ultra-low power heterogeneous system for bio-signal analysis L Duch, S Basu, R Braojos, G Ansaloni, L Pozzi, D Atienza IEEE Transactions on Circuits and Systems I: Regular Papers 64 (9), 2448-2461, 2017 | 43 | 2017 |
| Design and architectural exploration of expression-grained reconfigurable arrays G Ansaloni, P Bonzini, L Pozzi 2008 Symposium On Application Specific Processors, 26-33, 2008 | 39 | 2008 |
| Integrated kernel partitioning and scheduling for coarse-grained reconfigurable arrays G Ansaloni, K Tanimura, L Pozzi, N Dutt IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 38 | 2012 |
| Power-efficient joint compressed sensing of multi-lead ECG signals H Mamaghanian, G Ansaloni, D Atienza, P Vandergheynst 2014 IEEE International Conference on Acoustics, Speech and Signal …, 2014 | 36 | 2014 |
| A methodology for embedded classification of heartbeats using random projections R Braojos, G Ansaloni, D Atienza 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 899-904, 2013 | 31 | 2013 |
| Partition and propagate: An error derivation algorithm for the design of approximate circuits I Scarabottolo, G Ansaloni, GA Constantinides, L Pozzi Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019 | 30 | 2019 |
| Machine learning approach for loop unrolling factor prediction in high level synthesis G Zacharopoulos, A Barbon, G Ansaloni, L Pozzi 2018 International Conference on High Performance Computing & Simulation …, 2018 | 28 | 2018 |
| Compiler-assisted selection of hardware acceleration candidates from application source code G Zacharopoulos, L Ferretti, G Ansaloni, G Di Guglielmo, L Carloni, ... 2019 IEEE 37th International Conference on Computer Design (ICCD), 129-137, 2019 | 25 | 2019 |
| RegionSeeker: Automatically identifying and selecting accelerators from application source code G Zacharopoulos, L Ferretti, E Giaquinta, G Ansaloni, L Pozzi IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018 | 25 | 2018 |
| Hardware/software approach for code synchronization in low-power multi-core sensor nodes R Braojos, A Dogan, I Beretta, G Ansaloni, D Atienza 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014 | 24 | 2014 |
| A synchronization-based hybrid-memory multi-core architecture for energy-efficient biomedical signal processing R Braojos, D Bortolotti, A Bartolini, G Ansaloni, L Benini, D Atienza IEEE Transactions on Computers 66 (4), 575-585, 2016 | 23 | 2016 |
| Embedded real-time ECG delineation methods: A comparative evaluation R Braojos, G Ansaloni, D Atienza, FJ Rincón 2012 IEEE 12th International Conference on Bioinformatics & Bioengineering …, 2012 | 22 | 2012 |
| i-DPs CGRA: an interleaved-datapaths reconfigurable accelerator for embedded bio-signal processing L Duch, S Basu, M Peón-Quirós, G Ansaloni, L Pozzi, D Atienza IEEE Embedded Systems Letters 11 (2), 50-53, 2018 | 20 | 2018 |
David AtienzaProfessor of Electrical and Computer Engineering, EPFLE-mail megerősítve itt: epfl.ch
